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| FAN2106 -- TinyBuckTM 6A, 24V Input Integrated Synchronous Buck Regulator April 2007 FAN2106 -- TinyBuckTM 6A, 24V Input Integrated Synchronous Buck Regulator Features Over 95% efficiency Internal power MOSFETs: High-side RDS(ON) = 30m Low-side RDS(ON) = 14m Integrated low-side Schottky diode Programmable frequency operation Power-good signal Wide input range: 3.0V to 24V Output voltage range: 0.8V to 90%VIN Input under-voltage lockout (UVLO) Programmable over-current protection Under-voltage, over-voltage, and thermal protection Selectable light-load power-saving mode 5x6mm, 25-pin, 3-pad MLP Description The FAN2106 TinyBuckTM is an easy-to-use, cost and space-efficient, synchronous buck solution. It enables designers to solve high current requirements in a small area with minimal external components. External programming of clock frequency, current limit, and loop response allows for optimization and flexibility selecting output filter components and transient response. The summing current mode modulator uses lossless current sensing for current feedback and over-current, and includes voltage feedforward. Fairchild's advanced BiCMOS power process, combined with a thermally efficient MLP package, provides lowRDS(ON) internal MOSFETs and the ability to dissipate high power in a small package. Under-voltage, thermal shutdown, and power-good are blanked at start-up, but protect the device from damage during fault conditions. Applications Thin and light Notebook PCs Graphics cards Battery-powered equipment Set-top box Point-of-load regulation Ordering Information Operating Part Number Temperature Range Pb-Free FAN2106MPX FAN2106EMPX -10C to 85C -40C to 85C Yes Yes Package Molded Leadless Package (MLP) 5x6mm Molded Leadless Package (MLP) 5x6mm Packing Method Tape and Reel Tape and Reel (c) 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 www.fairchildsemi.com FAN2106 -- TinyBuckTM 6A, 24V Input Integrated Synchronous Buck Regulator Typical Application Diagram Figure 1. Typical Application Block Diagram Figure 2. Block Diagram (c) 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 www.fairchildsemi.com 2 FAN2106 -- TinyBuckTM 6A, 24V Input Integrated Synchronous Buck Regulator Pin Assignments Figure 3. MLP 5x6mm Pin Configuration (PCB Layout View) Pin Definitions Pin P1, 6-12 P2, 2-5 P3, 21-23 1 Name SW PVIN PGND BOOT Description Switching Node. Power Input Voltage. Connect to the main input power source. Power Ground. Power return and Q2 source. High-Side Drive BOOT Voltage. Connect through capacitor (CBOOT) to SW. The IC includes an internal synchronous bootstrap diode to recharge the capacitor on this pin to VCC when SW is LOW. Power-Good Flag. An open-drain output that pulls LOW when FB is outside a 10% range of the reference when EN is HIGH. PGOOD does not assert HIGH until the fault latch is enabled. ENABLE. Enables operation when pulled to logic HIGH or left open. Toggling EN resets the regulator after a latched fault condition. This input has an internal pull-up when the IC is functioning normally. When a latched fault occurs, EN is discharged by a current sink. Input Bias Supply for IC. The IC's logic and analog circuitry are powered from this pin. Analog Ground. The signal ground for the IC. All internal control voltages are referred to this pin. Tie this pin to the ground island/plane through the lowest impedance connection. Current Limit. A resistor (RILIM) from this pin to AGND can be used to program the currentlimit trip threshold lower than the default setting. Oscillator Frequency. A resistor (RT) from this pin to AGND sets the PWM switching frequency. Output Voltage Feedback. Connect through a resistor divider to the output voltage. Compensation. Error amplifier output. Connect the external compensation network between this pin and FB. Forced PWM / VOUT. Connect to VOUT to enable light-load, power-saving mode of operation. Connect to GND or leave open for PWM mode. Ramp Amplitude. A resistor (RRAMP) connected from this pin to PVIN sets the ramp amplitude and provides voltage feedforward functionality. 13 PGOOD 14 15 16 17 18 19 20 24 25 EN VCC AGND ILIM R(T) FB COMP PWM# / VOUT RAMP (c) 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 www.fairchildsemi.com 3 FAN2106 -- TinyBuckTM 6A, 24V Input Integrated Synchronous Buck Regulator Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Parameter PVIN to PGND VCC to AGND BOOT to PGND BOOT to SW SW to PGND All other pins Continuous AGND = PGND Conditions Min. Max. 28 6 35 Unit V V V V V V V -0.3 -0.5 -5 -0.3 Transient (t < 20nsec, F < 600KHz) 6 24 30 VCC+0.3 Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol VCC VIN TA TJ Parameter Bias Voltage Supply Voltage Ambient Temperature Junction Temperature Conditions VCC to AGND PVIN to PGND FAN2106M FAN2106EM Min. 4.5 3 -10 -40 Typ. 5.0 Max. 5.5 24 85 85 125 Unit V V C C C Thermal Information Symbol TSTG TL TVP TI JC J-PCB PD Storage Temperature Lead Soldering Temperature, 10 seconds Vapor Phase, 60 seconds Infrared, 15 seconds Thermal Resistance: Junction-to-Case P1 (Q2) P2 (Q1) P3 Thermal Resistance: Junction-to-Mounting Surface Power Dissipation, TA = 25C 4 7 4 35(1) 2.8 (1) Parameter Min. -65 Typ. Max. 150 300 215 220 Unit C C C C C/W C/W C/W C/W W Note: 1. Typical thermal resistance when mounted on a four-layer, two-ounce PCB, as shown in Figure 25. Actual results are dependent on mounting method and surface related to the design. (c) 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 www.fairchildsemi.com 4 FAN2106 -- TinyBuckTM 6A, 24V Input Integrated Synchronous Buck Regulator Electrical Specifications Recommended operating conditions are the result of using the circuit shown in Figure 1 unless otherwise noted. Parameter Power Supplies Conditions SW = Open, FB = 0.7V, VCC = 5V, FSW = 600KHz Shutdown: EN=0, VCC = 5V Power Saving Mode, VCC = 5V, FMIN Rising VCC Hysteresis VCC = 5V, 25C VCC = 5V, 25C RT = 50K RT = 24K Min. Typ. 8 7 2.2 Max. 12 10 4.5 4.5 Unit mA A mA V mV VCC Current VCC UVLO Threshold Power Output Section N-Channel (Q1) RDS(ON) N-Channel (Q2) RDS(ON) Oscillator Frequency Minimum On-Time (2) 4.1 4.3 300 30 14 35 16 345 660 65 m m KHz KHz nsec V 255 540 300 600 50 Ramp Amplitude, pk-pk Minimum Off-Time(2) Reference Reference Voltage (VFB) Error Amplifier DC Gain(2) Gain Bandwidth Product(2) Output Voltage (VCOMP) Output Current, Sourcing Output Current, Sinking FB Bias Current Protection and Shutdown Current Limit ILIM Current Over-Temperature Shutdown Over-Temperature Hysteresis Over-Voltage Threshold Under-Voltage Shutdown Fault Discharge Threshold Fault Discharge Hysteresis 16VIN, 1.8VOUT, RT = 30K, RRAMP = 200K 0.53 100 150 806 805 nsec mV mV dB MHz FAN2106M, 25C FAN2106EM, 25C VCC = 5V VCC = 5V VCC = 5V VCC = 5V, VCOMP = 2.2V VCC = 5V, VCOMP = 1.2V VFB = 0.8V, 25C RILIM open Die temperature Die temperature 2 consecutive clock cycles 16 consecutive clock cycles Measured at FB pin Measured at FB pin (VFB ~500mV) 794 795 80 12 0.4 1.5 0.8 -850 6 -11 800 800 85 15 3.2 2.2 1.2 -650 8 -10 150 25 -450 10 -9 V mA mA nA A A C C 110 68 115 73 250 250 120 78 %VOUT %VOUT mV mV Note: 2. Specifications guaranteed by design and characterization; not production tested. (c) 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 www.fairchildsemi.com 5 FAN2106 -- TinyBuckTM 6A, 24V Input Integrated Synchronous Buck Regulator Electrical Specifications (Continued) Recommended operating conditions are the result of using the circuit shown in Figure 1 unless otherwise noted. Parameter Soft-Start EN to VOUT Regulation (T0.8) EN to Fault Enable/SSOK (T1.0) Control Functions EN Threshold, Rising EN Hysteresis EN Pull-Up Resistance EN Discharge Current FB OK Drive Resistance PGOOD Threshold PGOOD Output Low PGOOD Output High PWM# Threshold PWM# Input Current FB < VREF FB > VREF IOUT < 2mA VPGOOD = 5V Conditions Frequency = 600KHz Frequency = 600KHz Min. Typ. 3.0 3.3 1.35 250 800 Max. Unit msec msec 2.0 V mV K A Auto-restart mode -14 107 1 800 -11 110 -8 113 0.4 1 0.6 0.8 1.2 1.0 %VFB %VFB V A V A VPWM# = 0.4V (c) 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 www.fairchildsemi.com 6 FAN2106 -- TinyBuckTM 6A, 24V Input Integrated Synchronous Buck Regulator Typical Characteristics 1.010 1.005 V FB 1.000 0.995 0.990 -50 0 50 Temperature (oC) 100 150 1.20 1.10 I FB 1.00 0.90 0.80 -50 0 50 Temperature (oC) 100 150 Figure 4. Reference Voltage (VFB) vs. Temperature, Normalized Figure 5. Reference Bias Current (IFB) vs. Temperature, Normalized 1500 1200 900 600 300 0 0 20 40 60 80 100 120 140 RT (K) 1.02 1.01 Frequency Frequency (KHz) 600KHz 1.00 300KHz 0.99 0.98 -50 0 50 Temperature ( C) o 100 150 Figure 6. Frequency vs. RT Figure 7. Frequency vs. Temperature, Normalized 1.60 1.40 I ILIM o Q1 ~0.32 %/ C 1.04 1.02 1.00 0.98 0.96 RDS 1.20 1.00 0.80 0.60 -50 0 50 Temperature ( C) o Q2 ~0.35 %/oC 100 150 -50 0 50 Temperature ( C) o 100 150 Figure 8. RDS vs. Temperature, Normalized (VCC = VGS = 5V) Figure 9. ILIM Current (IILIM) vs. Temperature, Normalized (c) 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 www.fairchildsemi.com 7 FAN2106 -- TinyBuckTM 6A, 24V Input Integrated Synchronous Buck Regulator Application Circuit Figure 10. Application Circuit: 1.8VOUT, 500KHz Typical Performance Characteristics Typical operating characteristics using the circuit shown in Figure 10. VIN=16V, VCC=5V, unless otherwise specified. 100 95 Dissipation (mW) 1400 1200 1000 800 600 400 200 0 Efficiency (%) 90 85 80 75 70 0 1 2 3 Load (A) 4 5 6 8VIN 12VIN 18VIN Power Saving Mode, 12VIN 8VIN 12VIN 18VIN Power Saving Mode, 12VIN 0 1 2 3 Load (A) 4 5 6 Figure 11. 100 95 Efficiency (%) 1.8VOUT Efficiency Over VIN vs. Load Figure 12. 1.8VOUT Dissipation Over VIN vs. Load 100 95 Efficiency (%) 90 85 80 75 70 90 85 80 75 70 0 1 2 3 Load (A) 4 5 6 8VIN, 300KHz 12VIN, 500KHz 18VIN, 700KHz VIN=12V 300KHz 500KHz 700KHz 0 1 2 3 Load (A) 4 5 6 Figure 13. 1.8VOUT Efficiency Over Frequency vs. Load (Circuit Value Changes) Figure 14. 3.3VOUT Efficiency vs. Load (Circuit Value Changes) (c) 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 www.fairchildsemi.com 8 FAN2106 -- TinyBuckTM 6A, 24V Input Integrated Synchronous Buck Regulator Typical Performance Characteristics (Continued) Typical operating characteristics using the circuit shown in Figure 10. VIN=16V, VCC=5V, unless otherwise specified. VOUT VOUT SW SW Figure 15. SW and VOUT Ripple, 6A Load Figure 16. SW and VOUT Ripple, 0.3A Load VOUT VOUT IOUT IOUT transition to PWM mode Figure 17. Transient Response, 2-6A Load Figure 18. Transient Response, 0.3-3A Load VOUT PGOOD EN Figure 19. Start-Up, 3A Load (c) 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 www.fairchildsemi.com 9 FAN2106 -- TinyBuckTM 6A, 24V Input Integrated Synchronous Buck Regulator Circuit Description Application Note AN-6033 -- FAN2106 Design Guide includes a spreadsheet design aid to calculate external component values and verify loop stability given the following inputs: Output voltage Input voltage range Maximum output load current Maximum load transient current and maximum allowable output drop during load transient Maximum allowable output ripple Desired switching frequency The regulator does not allow the low-side MOSFET to operate in full synchronous rectification mode until SS reaches 95% of VREF (~0.76V). This prevents the regulator from discharging the output and ensures that inductor current does not "ratchet" up during the softstart cycle. VCC UVLO or toggling the EN pin discharges the SS and resets the IC. Bias Supply The FAN2106 requires a 5V supply rail to bias the IC and provide gate-drive energy. Connect a >1.0f X5R or X7R decoupling capacitor between VCC and PGND. Since VCC is used to drive the internal MOSFET gates, supply current is frequency and voltage dependent. Approximate VCC current (ICC) can be calculated using: ICC(mA ) = 4.58 + [( VCC - 5 + 0.013 ) * (F - 128 )] 227 Initialization Once VCC exceeds the UVLO threshold and EN is HIGH, the IC checks for an open or shorted FB pin before releasing the internal soft-start ramp (SS). If R1 is open, the error amplifier output (COMP) is forced LOW and no pulses are generated. After the SS ramp times out (T1.0), an under-voltage latched fault occurs. If the parallel combination of R1 and RBIAS is 1K, the internal SS ramp is not released and the regulator does not start. EQ. 1 where frequency (F) is expressed in KHz. Setting the Output Voltage The output voltage of the regulator can be set from 0.8V to 90% of VIN by an external resistor divider (R1 and RBIAS in Figure 1). The internal reference is 0.8V with 650nA, sourced from the FB pin to ensure that, if the pin is open, the regulator does not start. The external resistor divider is calculated using: Soft-Start Once SS has charged to 0.8V (T0.8), the output voltage is in regulation. Until SS reaches 1.0V (T1.0), the "Fault Latch" and power-saving mode operations are inhibited. To avoid skipping the soft-start cycle, it is necessary to apply PVIN before VCC reaches its UVLO threshold. Soft-start time is a function of oscillator frequency. V - 0 .8 V 0 .8 V = OUT - 650nA RBIAS R1 Connect RBIAS between FB and AGND. EQ. 2 To minimize noise pickup on the FB node, the values of R1 and RBIAS should be selected to provide a minimum parallel impedance of 1K. Setting the Frequency Oscillator frequency is determined by an external resistor, RT, connected between the R(T) pin and AGND: F(KHz ) = 10 6 ( 65 * R T ) + 135 EQ. 3 where RT is expressed in K. R T ( K ) = Figure 20. Soft-Start Timing Diagram (10 6 / F) - 135 65 EQ. 4 where frequency (F) is expressed in KHz. The regulator can not start if RT is left open. (c) 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 www.fairchildsemi.com 10 FAN2106 -- TinyBuckTM 6A, 24V Input Integrated Synchronous Buck Regulator Calculating the Inductor Value Typically the inductor is set for a ripple current (IL) of 10% to 35% of the maximum DC load. Regulators requiring fast transient response use a value on the high side of this range, while regulators that require very low output ripple and/or use high-ESR capacitors restrict allowable ripple current: IL = VOUT * (1 - D) L *F EQ. 5 Loop Compensation The loop is compensated using a feedback network around the error amplifier. Figure 21 shows a complete Type-3 compensation network. Type-2 compensation eliminates R3 and C3. where F is the oscillator frequency, and L= VOUT * (1 - D) IL * F EQ. 6 Setting the Ramp Resistor Value The internal ramp voltage excursion (VRAMP) during tON should be set to 0.6V. RRAMP is approximately: RRAMP(K ) = 18 x10 - 6 * VIN * F ( VIN - 1.8) * VOUT -2 EQ. 7 Figure 21. Compensation Network where frequency (F) is expressed in KHz. Setting the Current Limit The FAN2106 uses its internal low-side MOSFET as the current-sensing element. The current-limit threshold voltage (VILIM) is compared to the voltage drop across the low-side MOSFET, sampled at the end of each PWM off-time/cycle. The default threshold (ILIM open) is temperature compensated. The 10A current sourced from the ILIM pin can be used to establish a lower, temperature-dependent, current-limit threshold by connecting an external resistor (RILIM) to AGND: RILIM(K) = 0.45 * RDS * K T * (IOUT - IL ) + 142.5 2 Since the FAN2106 employs summing current-mode architecture, Type-2 compensation can be used for many applications. For applications that require wide loop bandwidth and/or use very low-ESR output capacitors, Type-3 compensation may be required. The AN-6033 spreadsheet calculator can be used to calculate these component values. Protection The converter output is monitored and protected against extreme overload, short-circuit, over-voltage, and undervoltage conditions. An internal "Fault Latch" is set for any fault intended to shut down the IC. When the fault latch is set, the IC discharges VOUT by enhancing the low-side MOSFET until FB<0.25V. The MOSFET is not turned on again unless FB>0.5V. This behavior discharges the output without causing undershoot (negative output voltage). EQ. 8 0.25/0.5V FB FAULT PWM GATE DRIVE PWM LATCH where: I = desired current limit set point in Amps, RDS is expressed in m, KT = the normalized temperature coefficient of the low-side MOSFET (Q2) from Figure 8. After 16 consecutive, pulse-by-pulse, current-limit cycles, the fault latch is set and the regulator shuts down. Cycling VCC or EN restores operation after a normal soft-start cycle (refer to Auto-Restart section). The over-current protection fault latch is active during the soft-start cycle. Figure 22. Latched Fault Response Under-Voltage Shutdown If FB remains below the under-voltage threshold for 16 consecutive clock cycles, the fault latch is set and the converter shuts down. This fault is prevented from setting the fault latch during soft-start. Over-Voltage Protection / Shutdown If FB exceeds 115% * VREF for two consecutive clock cycles, the fault latch is set and shutdown occurs. A shorted high-side MOSFET condition is detected when SW voltage exceeds ~0.7V while the low-side (c) 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 www.fairchildsemi.com 11 FAN2106 -- TinyBuckTM 6A, 24V Input Integrated Synchronous Buck Regulator MOSFET is fully enhanced. The fault latch is set immediately upon detection. These two fault conditions are allowed to set the fault latch at any time, including during soft-start. Power-Saving Mode The FAN2106 maintains high efficiency at light load by changing to a discontinuous constant peak current, power-saving mode (PSM). The transition to power-saving mode occurs when the load is Auto-Restart After a fault, EN is discharged with 1A to a 1.1V threshold before the 800K pull-up is restored. A new soft-start cycle begins when EN charges above 1.35V. Depending on the external circuit, the FAN2106 can be provisioned to remain latched-off or automatically restart after a fault. Table 1. Fault / Restart Provisioning EN pin Pull to GND VCC Open Cap to GND Controller / Restart State OFF (disabled) No restart - latched OFF Immediate restart after fault New soft-start cycle after: tDELAY (msec) = 3.9 * C(nf) With EN left open, restart is immediate. VOUT (V) Increasing Load Decreasing Load If auto-restart is not desired, tie the EN pin to the VCC pin or drive it with a logic gate to keep the 1A current sink from discharging EN to 1.1V. 1.84 1.82 1.80 1.78 0 1 2 3 Load (A) 4 5 6 Forced PWM Figure 24. Power-Saving Mode Regulation (Using Figure 10 Circuit) Power-saving mode operation is defeated by connecting the PWM# pin to AGND, allowing only PWM operation. The PWM# pin has a 1A pull-down. If <0.6V is detected, power-saving mode operation is disabled. PCB Layout Figure 23. Fault Latch with Delayed Auto-Restart Over-Temperature Protection The chip incorporates an over-temperature protection circuit that sets the fault latch when a die temperature of about 150C is reached. The IC is allowed to restart when the die temperature falls below 125C. Power Good (PGOOD) Signal PGOOD is an open-drain output that asserts LOW when VOUT is out of regulation, as measured at the FB pin. Thresholds are specified in the Electrical Specifications section. PGOOD does not assert HIGH until the fault latch is enabled (T1.0). Figure 25. Recommended PCB Layout (c) 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 www.fairchildsemi.com 12 FAN2106 -- TinyBuckTM 6A, 24V Input Integrated Synchronous Buck Regulator Physical Dimensions Dimensions are in millimeters (inches) unless otherwise noted. 6.57 6.0 0.85 0.68 2.78 2.02 5.0 5.57 2.95 2.51 2.06 1.00 0.10 C 0.10 C 3.28 0.65 0.32 2X 2.45 2.88 1.49 3.44 0.43 1.22 2.20 1.51 TOP VIEW 0.80 MAX 0.10 C 2X RECOMMENDED LAND PATTERN ALL DIMENSIONS NOMINAL (0.20) 0.08 C 0.05 0.00 SIDE VIEW 2.20 1.51 SEATING PLANE 1 25 8 9 1.22 3.44 2.02 0.65 21 20 0.65 2.88 12 13 0.25~0.35 0.10 0.05 CAB C BOTTOM VIEW A. DIMENSIONS ARE IN MILLIMETERS. B. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 C. ENGINEERING DRAWING ONLY, CHANGES MAY OCCUR MLP25ArevA Figure 26. 5x6mm Molded Leadless Package (MLP) (c) 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 www.fairchildsemi.com 13 FAN2106 -- TinyBuckTM 6A, 24V Input Integrated Synchronous Buck Regulator (c) 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 www.fairchildsemi.com 14 |
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